Five optimized designs of comparator

Xingyu Chen; Kai Shi; Yuming Wang

doi:10.1117/12.2627222

14 February 2022 Five optimized designs of comparator

Xingyu Chen, Kai Shi, Yuming Wang

Proceedings Volume 12161, 4th International Conference on Informatics Engineering & Information Science (ICIEIS2021); 121611J (2022) https://doi.org/10.1117/12.2627222
Event: 4th International Conference on Informatics Engineering and Information Science, 2021, Tianjin, China

Abstract

Comparators contribute a significant role to analog to digital converters (ADC). Considering the comparator design, several performances should be deal with. Several optimizing methods for comparator design in recent years are reviewed in this work. Based on the traditional amplifiers, FIA (Floating Inverter Amplifier) technology is used to improve the preamplifier, thus achieving low power consumption. Triple-Latch Feedforward Dynamic Comparator by adding a feedforward path to reduce delay and a Rail-to-Rail Dynamic Voltage Comparator combines NAND logic circuit and NOR logic circuit to enable the comparator to operate in full scale of input voltage also proposed especially for low-input applications.

Citation Download Citation

Xingyu Chen, Kai Shi, and Yuming Wang "Five optimized designs of comparator", Proc. SPIE 12161, 4th International Conference on Informatics Engineering & Information Science (ICIEIS2021), 121611J (14 February 2022); https://doi.org/10.1117/12.2627222

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