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In this paper, a 16-bit two-stage analog-to-digital converter (ADC) for 320×256 infrared focal plane array readout integrated circuit (ROIC) is proposed. Compared with the traditional pixel-level pulse frequency modulation (PFM) structure, the optimized pixel-level column-level hybrid ADC based on two-stage quantization structure proposed in this paper can achieve higher linearity and lower power consumption while maintaining its high dynamic range. This design is based on 0.18μm 1P5M CMOS process. The pixel circuit pitch is 30μm, and the array size is 11mm×11mm. According to the simulation results, the non-linearity is 0.15%, which means the good linearity is achieved. The typical power consumption of the proposed pixel array is 61mW. The charge handling capacity is 1Ge-, and the dynamic range is 94.45dB.
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