Resistance to side-channel attacks of CPU based on random power consumption disturbance strategy

Yidong Yuan; Qi Chen; Xuesong Yan; Lei Li; Liang Liu; Yiqiang Zhao

doi:10.1117/12.2642112

28 July 2022 Resistance to side-channel attacks of CPU based on random power consumption disturbance strategy

Yidong Yuan, Qi Chen, Xuesong Yan, Lei Li, Liang Liu, Yiqiang Zhao

Proceedings Volume 12303, International Conference on Cloud Computing, Internet of Things, and Computer Applications (CICA 2022); 123030V (2022) https://doi.org/10.1117/12.2642112
Event: International Conference on Cloud Computing, Internet of Things, and Computer Applications, 2022, Luoyang, China

Abstract

Side-channel attacks (SCAs) have become one of the main threats to encryption devices due to their low cost, short time, and strong attack capability. CPU is the core of encryption devices. Thus the resistance to SCAs of the CPU is essential for protecting encrypted information. Based on the register-transfer level (RTL) net-list simulation and CPA method, this paper carries out SCAs on the CPU running the AES-128 algorithm. A protection scheme based on random power consumption disturbance strategy is proposed. It uses register configuration to send random pseudo operation insertion requests to some idle modules inside the CPU at a certain frequency, thereby reducing the correlation between the power consumption and encrypted data. This paper innovatively analyses the effects of the number of randomly flipped modules and the insertion frequency of random pseudo operation on the CPU's resistance to SCAs. According to experimental results, when the CPU is not protected, only 30 power traces are able to reveal the correct key. The required trace number increases when the random power consumption disturbance strategy is applied. The anti-attack performance of the CPU is proportional to the number of randomly flipped idle modules, and approximately inversely proportional to the power consumption signal-to-noise ratio (SNR). Particularly, when all idle modules randomly flip at a frequency of 25%, the CPU’s anti-attack performance has been improved by 3700 times. The proposed protection scheme is simple, easy to implement and highly flexible, by taking the safety performance, power consumption, area and other factors into consideration.

Citation Download Citation

Yidong Yuan, Qi Chen, Xuesong Yan, Lei Li, Liang Liu, and Yiqiang Zhao "Resistance to side-channel attacks of CPU based on random power consumption disturbance strategy", Proc. SPIE 12303, International Conference on Cloud Computing, Internet of Things, and Computer Applications (CICA 2022), 123030V (28 July 2022); https://doi.org/10.1117/12.2642112

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