Paper
28 July 2022 A number theoretic transform accelerator with two parallel simplified butterfly units
Buqing Xu, Jinjiang Yang, Wei Ge, Qiyi Zhao, Min Zhu, Youyu Wu
Author Affiliations +
Proceedings Volume 12303, International Conference on Cloud Computing, Internet of Things, and Computer Applications (CICA 2022); 123031H (2022) https://doi.org/10.1117/12.2642606
Event: International Conference on Cloud Computing, Internet of Things, and Computer Applications, 2022, Luoyang, China
Abstract
Polynomial multiplication is the most compute-intensive in the Lattice-based post-quantum cryptography (PQC). This operation can be sped up using the number theoretic transform (NTT). A lot of research is currently being done on how to speed up the NTT algorithm. In light of these considerations, this study presents an NTT accelerator with a greatly simplified butterfly unit (BFU) architecture, a completely pipelined modular multiplication (MM) unit, and two parallel computing units. FPGA implementation is realized to evaluate this work. Through the experimental results, processing speed can achieve 2× improvements with controllable resource consumption.
© (2022) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Buqing Xu, Jinjiang Yang, Wei Ge, Qiyi Zhao, Min Zhu, and Youyu Wu "A number theoretic transform accelerator with two parallel simplified butterfly units", Proc. SPIE 12303, International Conference on Cloud Computing, Internet of Things, and Computer Applications (CICA 2022), 123031H (28 July 2022); https://doi.org/10.1117/12.2642606
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KEYWORDS
Field programmable gate arrays

Algorithm development

Computer architecture

Control systems

Clocks

Computing systems

Parallel computing

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