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4 April 2023 An FPGA implementation for CCSDS standard high speed low complexity SCPPM decoder
Xuming Huang, Xiaowei Wu, Lintao Li, Wenhao Wang, Lei Yang
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Proceedings Volume 12617, Ninth Symposium on Novel Photoelectronic Detection Technology and Applications; 126174A (2023) https://doi.org/10.1117/12.2666299
Event: 9th Symposium on Novel Photoelectronic Detection Technology and Applications (NDTA 2022), 2022, Hefei, China
Abstract
We present a high-speed, low-complexity, CCSDS-compatible SCPPM decoder architecture. At the algorithmic level, we use a combination of low-complexity Max-Log-MAP and SF-Max-Log-MAP algorithm. For both outer code and inner code SISO decoding module, we halve the delay by using a bidirectional calculation structure. We adopt the parallel-edge pre-computation and propose a symbol splitting method to reduce the complexity of the inner APPM decoder. We implement our proposed SCPPM design for 16-PPM in the FPGA platform. The implemented decoder achieves a throughput rate of more than 800Mbits per second at 250MHz clock. Meanwhile, our proposed SS-APPM inner decoder has an 80% reduction in FPGA logic resource utilization compared to the conventional APPM inner decoder.
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Xuming Huang, Xiaowei Wu, Lintao Li, Wenhao Wang, and Lei Yang "An FPGA implementation for CCSDS standard high speed low complexity SCPPM decoder", Proc. SPIE 12617, Ninth Symposium on Novel Photoelectronic Detection Technology and Applications, 126174A (4 April 2023); https://doi.org/10.1117/12.2666299
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KEYWORDS
Field programmable gate arrays
Telecommunications
Quantization
Design and modelling
Laser communications
Optical communications
Receivers
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