Paper
1 August 2023 Design and FPGA implementation of JPEG-LS image decompression
Author Affiliations +
Proceedings Volume 12752, Second International Conference on Optoelectronic Information and Computer Engineering (OICE 2023); 127520F (2023) https://doi.org/10.1117/12.2691290
Event: Second International Conference on Optoelectronic Information and Computer Engineering (OICE 2023), 2023, Hangzhou, China
Abstract
As the resolution of images processed in real-time continues to increase, it is necessary to compress the transmitted image data, and then transmit it to the terminal to decompress and restore the image. JPEG-LS is an algorithm that supports lossless and near-lossless compression. However, the decompression of JPEG-LS images is mostly implemented in a software environment. When decompressing multiple high-resolution images, the problems of decoding speed and resource consumption are more prominent. Therefore, the implementation of the JPEG-LS image decompression algorithm on FPGA is proposed in this paper, which divides the image into blocks and adopts a parallel processing structure. After the experiment on the hardware decoder, for the 1024*2048 test image, the designed hardware decoder can improve the original software decoding time by approximately 55%.
© (2023) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Junjie Li, Zhen Wang, Xinping Pan, and Xiaolin Shi "Design and FPGA implementation of JPEG-LS image decompression", Proc. SPIE 12752, Second International Conference on Optoelectronic Information and Computer Engineering (OICE 2023), 127520F (1 August 2023); https://doi.org/10.1117/12.2691290
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KEYWORDS
Image processing

Field programmable gate arrays

Image compression

Data processing

Rubidium

Design and modelling

Algorithm development

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