1.

INTRODUCTION

Satellite communication operators turn towards increasing capacity payloads for geostationary (GEO) satellites, with higher number of beams and larger aggregate bandwidth to provide fast internet service to as many households as financially viable. Capacities of these large payloads – HTS or VHTS – easily reach several hundreds of Mbit/s and even Tbit/s. Along with capacity, flexibility is another key feature to ensure space systems can adapt to changes in the traffic allocation reflecting customer’s needs or in the progressive growth of the ground infrastructure. In complement, Medium- or Low-Earth-Orbit (MEO/LEO) constellations provide world-wide coverage with the similarly increasing capacity and flexibility targets.

All these new features are possible thanks to processor-based digital payloads. Of course, the processor units follow the same trends of capacity increase while maintaining acceptable power/mass budgets and fast responses in case of reconfiguration. Processors are also used to cover more and more functionalities inside the payload such as Digital Beamforming handling several hundreds of RF accesses from active antennas. Hence, these units become quite large and high-speed interconnectivity is needed.

To keep up with these demands, top-end technology such as optical links are key to offer data rates of several Gbit/s over several meters offering much needed flexibility of accommodation of the processor elements inside payloads

2.

ON BOARD DIGITAL TRANSPARENT PROCESSOR

Digital transparent processor (DTP) are at the heart of the advanced flexible telecom payloads. These units interface with RF front-ends through analogue-to-digital (ADC) and digital-to-analogue converters (DAC) to convert communication channels in digital samples. DTP processing ensures these RF signals are split into fine spectrum slices, called elementary bandwidths or subchannels, routed by the processor in a flexible, transparent and reconfigurable way. DTP routes the signal without demodulation and decoding and offers full spatial routing, channelization, spectrum equalisation on a port by port basis, gain control on each channel, multicast and broadcast capabilities.

Each generation of DTP designed and developed by Thales Alenia Space has been associated with technology steps especially for ASIC mainly in charge of the processing. They also mark an improvement of the power and mass per processed bandwidth.

The latest generations - DTP3G and DTP5G - are in flight since 2019 and 2021 respectively. DTP3G is a processor designed for Milsatcom/GovSatCom missions with high performances and small frequency granularity. DTP5G is a powerful processor designed for broadband HTS/VHTS satellites. The latest generation of DTP, called DTP6G, used for Space Inspire Payloads, offers Digital Beamforming among many other features such as High-speed Command & Control link modem. It helps benefit from the flexible coverage of active antennas through thousands of in-flight-reconfigurable beams and channels.

Figure 1.

Thales Alenia Space Digital Transparent Processor Roadmap

Table 1.

Main characteristics of Thales Alenia Space successive DTP generations

*

without DBFN

To keep up with the demand for increasing processor capacity, disruptive technologies have been introduced for each DTP generations. Since DTP5G, high-speed electrical interconnects have been replaced by optical interconnects [1,2,3,4]. On DTP5G, optical transceivers working at high speed data rate higher than 10 Gbps were introduced after a selection and qualification process [5,6,8]. Needs for even higher data rates over more links with optimized mass and power budgets for DTP6G led to a reassessment of the optical interconnect architecture and the selection of new transceiver operating at data rates higher than 20 Gbps.

Figure 2.

Digital interconnect characteristics per DTP generations

3.

OPTICAL INTERCONNECTS

The DTP optical interconnect solution is based on the introduction of optical multichannel transceivers with data rate above 20Gbps, interconnected by optical ribbons to the edge of the module, and by optical routing boxes between modules. The following figure illustrates the optical interconnect architecture:

Figure 3.

Optical interconnect architecture

This modular architecture is easily scalable and is well defined to adapt to varying processor sizes.

Key technology drivers are the optical transceivers (detailed in the following paragraph) and the optical routing box, in a lesser degree optical ribbons and connectors. These allow to optimize the global architecture of the DTP while maintaining scalability and flexibility of accommodation:

Figure 4.

Optical Routing Box

4.

OPTICAL TRANSCEIVERS

After an initial market survey, Thales Alenia Space have led a preselection of the 3 best candidates among the numerous actors of the optical transceiver space and commercial markets taking into account performances/power balances and compatibility with space environment.

Full-duplex transceivers are well adapted to DTP5G and DTP6G architectures as high-speed Serial links are mostly bidirectionnal. As for DTP5G, main candidates for DTP6G were full-Duplex 4Tx/4Rx optical transceiver solutions. Simplex versions such as up to12 Tx-only and 12 Rx-only were not as optimized to the link network architecture.

Transceiver, implementing Vertical-Cavity Surface-Emitting Laser (VCSEL), 850 nm wavelength and using Multi-Mode fibers, were selected, as for DTP5G, as they provide best power efficiency and compatibility to space environment.

4.1

Transceiver architecture description

The 4-way full-duplex transceivers are composed of Transmit (Tx, Electric-to-Optical) and Receive (Rx, Optical-to-Electric) functions in the same package as illustrated in the figure here below. The Tx side is driven by differential electrical inputs (CML), converted to a modulated current to drive the Vertical-Cavity Surface-Emitting Laser (VCSEL). The generated light is composed of a modulated current (Imod) added to an average value (Iavg). A peak current (Ipeak) can be added at transitions to improve signal establishment and link budget.

The Rx side collects the modulated light and converts it to current thanks to a photodiode. A Transimpedance Amplifier (TIA) followed by a CML buffer transforms the signal in an differential voltage output.

VCSEL drivers and TIA provide a number of features allowing the user to adjust performances on Tx and Rx sides.

Figure 5.

Full-Duplex Transceiver synoptic and waveforms

4.2

Transceiver evaluation process

After the initial preselection, the first phase of the evaluation process consists in the assessment of the link performances of each transceiver followed by the precise tuning of the features to find the best balance between link performances, transceiver power consumption and reliability as described in the next paragraph. Then, the suitability of the transceiver to a space environment and to a field mission of 15 years is evaluated through derisking tests taking into account the electro-optical performance stability over temperature, the thermal behaviour of the module as well as its robustness when submitted to radiation. Along with these mission criteria, industrial aspects such as component mounting on board/connectivity of the fibers, price/lead-time were also monitored to ensure DTP product cost and schedule targets.

Figure 6

Transceiver selection and evaluation process

4.3

Transceiver configuration convergence

As explained in the previous paragraph, the optimization of the module is key regarding the mission profile. It has to be performed using the configuration tools provided by each manufacturer of transceiver. The considered parameters are the summits of the triangle here below.

Figure 7.

Transceiver performance trade-off

To achieve this goal, several parameters on the Tx side as well on the Rx side of the link can be adjusted in the registers of the transceivers.

The available features and parameters are

• • on Tx-side, gain and bandwidth of the various stages such as CML buffer, VCSEL driver as well as the optical current waveform (average, modulated, peaking).

• • on Rx-side, implementation of a Clock-Data-Recovery function on the optical link (a function allowing to recover the clock from the data stream in order to reach better performances by cleaning part of the jitter), tuning of TIA gains and electrical stage output swing/pre-emphasis/equalization.

The table hereafter gives the interdependency of each parameter showing how the improvement of some of them degrades others and thus the overall performances.

Table 2.

Transceiver configuration targets, means and impacts

Rank	Improvement	Means	Impacts
1	Electro-Optical performances	Increase of VCSEL current (average and modulated)Implementation signal-boosting features (pre-emphasis/equalization)	➔ increases of transceiver power/temperature
➔ degrades reliability
2	Reliability	Decrease of VCSEL currentsAdd signal-boosting features (pre-emphasis/equalization) to compensate current reduction	➔ limits E/O performances
➔ increases component power/temperature
3	power consumption / temperature	Lower VCSEL currentsReduce signal-boosting features (pre-emphasis/equalization)	➔ limits E/O performances

4.5

Thermal management

The thermal management of the component in vacuum is also a critical contributor to the trade-off. Detailed behaviour of the component in vacuum can be hard to obtain from the suppliers as it is specific to space applications. To collect these figures, different methods were used to evaluate the thermal resistance of all key elements of the transceivers. Only three of them gave satisfactory results and were implemented.

The temperature can be acquired by:

• 1) Using internal sensors inside the components. Most drivers or TIA provide an analog output mirroring the die temperature. This method often requires calibration to compensate for limited absolute accuracy. It only provides local temperature and key elements such as VCSEL may not be directly monitored.

• 2) Using liquid crystals. This method requires to open the component, remove possible coatings and place a small amount of crystals inside the module. Temperature shifts due to power dissipation change the crystal polarization and the rendered colour at well-defined temperatures. These variations can be monitored by a polarized microscope and provide a mapping of the entire component.

• 3) Using the Laser wavelength shift due to temperature. Indeed, the VCSEL centre wavelength is very sensitive to temperature. After a calibration phase, measuring the wavelength drift allows to define the temperature changes in the VCSEL junction, which a key element for reliability. Nevertheless, computation of the corresponding VCSEL power dissipation can be complex as it relies on the electro-optical conversion efficiency.

• 4) Using a thermal camera. This method, used in many other applications, also requires opening the modules, removing coatings. It can deliver a thermal mapping of all the elements inside the transceiver but relies on well-mastered surface emissivities. In our case, painting was attempted to standardize emissivity. It led to device malfunction and was abandoned.

Figures here below illustrate the different methods with their advantages and disadvantages.

Figure 8.

Transceiver internal sensor

Figure 9.

Liquid crystal Color change vs Temperature

Figure 10.

Wavelength shift with temperature

Figure 11.

thermal camera

The first three methods were used to obtain both the thermal mapping of all components inside transceiver modules and precise measurement on key components (drivers, TIA, VCSELs). The last method needed a complex and potentially damaging process to obtain precise results and was abandoned. The collected thermal data also provided valuable inputs for the reliability analyses and candidate selection. One of selected candidates presented unsatisfactory thermal control performances leading to excessive internal temperatures and degraded reliability.

4.6

Electro-optical (E/O) performances over temperature

The third key element of the trade-off is the performance stability over temperature based on the following parameters:

• - The Bit Error Rate (BER) corresponds to the amount of erroneous bits divided by the total amount of bits received. It is measured using a pseudo-random binary sequence transmitted over the link and compared on the Rx side to the expected pattern. Its accuracy is function of the measuring time.

  For example, at 20Gbps, 1E12 bits are transmitted in 50s. Hence, a 1E-12 BER performance can be measured for N x 50s with N being at least 3 or 4.

• - The optical power delivered by the Tx is measured with an optical power meter

• - The minimum power received by the Rx corresponding to a BER of 1E-12 (called Receiver Sensitivity) measured by adding attenuation inside the optical link.

• - The optical link budget is the difference of the Tx optical power and Receiver Sensitivity.

• - The end-to-end eye diagram is the superposition of the transmitted bits and measures the digital signal integrity. Its compliance is checked with regards to the 100GBASE-SR4 Ethernet standard.

These parameters are illustrated in the following figure.

Figure 12.

transceiver E/O performance evaluation over temperature

At the end of the transceiver configuration convergence, all candidates presented acceptable performances for the listed parameters. Temperature behaviour between candidates was not a decisive differentiator for the trade-off.

4.8

Evaluation process conclusion

At the end of process only one candidate was fully compliant to the requirements. One candidate did not pass the heavy-ion test campaign as latch-up events were reported. Another candidate did not offer satisfactory power consumption and thermal management.

5.

PROJECTION INTO FUTURE NEEDS IN OPTICAL LINKS

Future processor generations, especially for GEO missions, are expected to keep the same trend of increasing sizes and data rates. Of course, the same needs of limited power/mass budgets, reliability and compatibility to space environment will remain paramount. From the current transceiver and projected processor architecture, the following outline of characteristics for the next generation of transceivers:

Table 3.

Projection in key characteristic of next generation of Transceiver

Figure 13.

Projection in key characteristic of next generation of Transceiver

Different solutions are considered for data rate increase [7,9,10]:

Figure 14.

Multi-core fiber and Wavelength Division Multiplexing schematic diagram

Figure 15.

optical PAM-4 signal acquired with oscilloscope

Nevertheless, some of them are suffering from key limitations which are explained in the following paragraph.

6.

CONCLUSIONS

Thales Alenia Space are developing a new generation of Digital Transparent Processor, DTP6G, with increased capacity and functionalities. New solutions of optical interconnects, a technology introduced in the previous DTP generation (DTP5G), are needed to reach such targets with optimized mass and power budgets. Optical interconnect architecture and a new transceiver operating at data rates higher than 20 Gbps was selected. The new interconnect solution and the selection process of the transceiver, compatible with a 15 year space mission, has been described.

Based on the current Thales Alenia Space experience, an outlook for the future transceiver needs of upcoming processor developments has been drawn : the trend for increased data rates is confirmed. Many promising solutions have been identified and must be analyzed to select the next generation of high-speed optical interconnects.