Improving asymmetric printing and low margin using custom illumination for contact hole lithography

Scott Jessen; Mark Terry; Mark Mason; Sean O'Brien; Robert Soper; Willie Yarbrough; Thomas Wolf

doi:10.1117/12.660120

17 March 2006 Improving asymmetric printing and low margin using custom illumination for contact hole lithography

Scott Jessen, Mark Terry, Mark Mason, Sean O'Brien, Robert Soper, Willie Yarbrough, Thomas Wolf

Proceedings Volume 6156, Design and Process Integration for Microelectronic Manufacturing IV; 615616 (2006) https://doi.org/10.1117/12.660120
Event: SPIE 31st International Symposium on Advanced Lithography, 2006, San Jose, California, United States

Abstract

Perhaps the most challenging level to print moving beyond 65 nm node for logic devices is contact hole. Achieving dense to isolated pitches simultaneously in a single mask print requires high NA with novel low-k1 imaging techniques. In order to achieve the desired dense resolution, off axis illumination (OAI) techniques such as annular and quasar are necessary. This also requires incorporation of sub-resolution assist features for improved semidense to isolated contact margin. We have previously discussed design related issues revolving around asymmetric contact hole printing and misplacement associated with using extreme off axis illumination (OAI). While these techniques offer the appropriate dense margin needed, there are regions of severe asymmetric printing which are unsolvable using optical proximity correction (OPC). These regions are impossible to avoid unless design rule restrictions or new illumination schemes are implemented. We continue this work with discussions revolved around illumination choices for alleviating these regions without losing too much dense margin.

Citation Download Citation

Scott Jessen, Mark Terry, Mark Mason, Sean O'Brien, Robert Soper, Willie Yarbrough, and Thomas Wolf "Improving asymmetric printing and low margin using custom illumination for contact hole lithography", Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 615616 (17 March 2006); https://doi.org/10.1117/12.660120

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