Paper
20 March 2008 Full-field imprinting of sub-40 nm patterns
Author Affiliations +
Abstract
Imprint lithography has been included on the ITRS Lithography Roadmap at the 32, 22 and 16 nm nodes. Step and Flash Imprint Lithography (S-FIL (R)) is a unique patterning method that has been designed from the beginning to enable precise overlay to enable multilevel device fabrication. A photocurable low viscosity resist is dispensed dropwise to match the pattern density requirements of the device, thus enabling patterning with a uniform residual layer thickness across a field and across multiple wafers. Further, S-FIL provides sub-50 nm feature resolution without the significant expense of multi-element projection optics or advanced illumination sources. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of imprint masks (templates). For sub-32 nm device manufacturing, one of the major technical challenges remains the fabrication of full-field 1x imprint masks with commercially viable write times. Recent progress in the writing of sub-40 nm patterns using commercial variable shape e-beam tools and non-chemically amplified resists has demonstrated a very promising route to realizing these objectives, and in doing so, has considerably strengthened imprint lithography as a competitive manufacturing technology for the sub-32nm node. Here we report the first imprinting results from sub-40 nm full-field patterns, using Samsung's current flash memory production device design. The fabrication of the imprint mask and the resulting critical dimension control and uniformity are discussed, along with image placement results. The imprinting results are described in terms of CD uniformity, etch results, and overlay.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jeongho Yeo, Hoyeon Kim, and Ben Eynon "Full-field imprinting of sub-40 nm patterns", Proc. SPIE 6921, Emerging Lithographic Technologies XII, 692107 (20 March 2008); https://doi.org/10.1117/12.775115
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Cited by 12 scholarly publications.
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KEYWORDS
Photomasks

Semiconducting wafers

Line width roughness

Lithography

Etching

Critical dimension metrology

Electron beam lithography

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