PROCEEDINGS ARTICLE | December 6, 2004
Proc. SPIE. 5567, 24th Annual BACUS Symposium on Photomask Technology
KEYWORDS: Reticles, Metals, Silicon, Manufacturing, Scanning electron microscopy, Design for manufacturing, Photomasks, Optical proximity correction, Semiconducting wafers, Resolution enhancement technologies
The ability to transfer designs with high fidelity onto photomasks and then to silicon is an increasingly complex task for advanced technology nodes. For example, the majority of the critical layers for even the 130nm node are patterned by sub-wavelength photolithography; therefore, the numerical aperture, illumination condition, and the resist process must be optimized to achieve the necessary resolution. The reticle, as a bridge between design and process, has become very complex due to the extensive application of resolution enhancement technologies (RETs). As the complexity of RETs increases, the final mask data can be vastly different from the original design due to a series of data manipulations. Optimizing the reticle layout plays the pivotal role in design-for-manufacturability (DFM) considerations.
In this paper, we will discuss how design rules must accommodate the needs of Optical Proximity Correction (OPC) and Phase-shifting Masks (PSM). The final layout on a mask after extensive polygon manipulation must also meet the capability and manufacturability of mask writing, mask inspection, and silicon processing. We will also discuss how the wafer fab's perspective can affect the mask shop. Throughout the discussion, we will demonstrate that the integration at mask level and the collaboration of design, RET, mask shop, and wafer fab are key to DFM success.
