Paper
30 July 2002 OPC applications into embedded-OPC designs
Author Affiliations +
Abstract
To achieve the demand of the ever-shrinking technologies, design engineers are embedding rule-based OPC (Optical Proximity Correction) or hand-applied OPC into bit-cell libraries. These libraries are then used to generate other components on a chip. This creates problems for the end users, the photolithographers. Should the photolithographer change the process used to generate the simulations for the embedded OPC, the process can become unstable. The temptation to optimize these shrinking cells with embedded adjustments can be overcome by other methods. Manually increasing fragmentation or manually freezing portions of bit cells can provide the same level of accuracy as a well-simulated embedded solution, so now the model-base OPC generated by the end user can be applied, tolerating process or illumination changes. Manually freezing portions of a bit cell can assist in optimization by blocking larger features from receiving a model-based solution, whereas increased fragmentation augments the model-based application. Freezing contacts or local interconnects landing sites at poly for example, would allow the model-based OPC to optimize the poly over the active regions where transistor performance is vital. This paper documents the problems seen with embedding OPC and the proper ways to resolve them. It will provide insight into embedded OPC removal and replacement. Simulations and empirical data document the differences seen between embedded-OPC bit cells and fragment-optimized bit cells.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
George E. Bailey and Travis E. Brist "OPC applications into embedded-OPC designs", Proc. SPIE 4691, Optical Microlithography XV, (30 July 2002); https://doi.org/10.1117/12.474502
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KEYWORDS
Optical proximity correction

Model-based design

Transistors

Photomasks

Process modeling

Etching

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