Paper
26 March 2007 Feasibility study of splitting pitch technology on 45-nm contact patterning with 0.93 NA
Yung Feng Cheng, Yueh Lin Chou, Ting Cheng Tseng, Bo Yun Hsueh, Chuen Huei Yang
Author Affiliations +
Abstract
As semiconductor process technology moves to smaller generations (65nm and beyond), the contact pattern printing becomes the most difficult challenge in the lithography field. The reason comes from the smaller feature size and pitch of contact/via pattern printing that is similar to 2D (two-dimensional) patterning. Contact and via patterns need better image contrast than line/space patterns in pattern printing. Hence, contact/via printing needs a higher k1 value than others. In 65nm generation experience, the k1 is ~0.44 on a 0.85 NA exposure tool. A larger NA exposure tool is expensive and developed slower than the motivation of generation. Hence, the process is difficult to achieve by obtaining larger NA exposure tools. The k1 requirement of 45nm (logic) contact pattering (minimum pitch: 140nm) is ~0.34 on a 0.93 NA exposure tool that is available currently. RET (resolution enhancement technology) is necessary to achieve the difficult process goal. Splitting pitch technology is an RET approach to solving 45nm contact pattering. In this paper, we use a 2P1E (2 photo exposure and 1 etching) approach to meet our process requirements. The original layout is split into dense pitch pattern and semi-iso to iso pattern parts by software. Utilizing strong OAI (off-axis-illumination) on dense pattern part and weak OAI on semi-iso to iso pattern part can obtain better process results.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yung Feng Cheng, Yueh Lin Chou, Ting Cheng Tseng, Bo Yun Hsueh, and Chuen Huei Yang "Feasibility study of splitting pitch technology on 45-nm contact patterning with 0.93 NA", Proc. SPIE 6520, Optical Microlithography XX, 65202N (26 March 2007); https://doi.org/10.1117/12.711904
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KEYWORDS
Printing

Semiconducting wafers

Logic

Optical lithography

Resolution enhancement technologies

Double patterning technology

Photomasks

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