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4 October 2022 Secure logic locking with hybrid CMOS-nanomagnet logic (Conference Presentation)
Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
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Proceedings Volume PC12205, Spintronics XV; PC122050M (2022) https://doi.org/10.1117/12.2633501
Event: SPIE Nanoscience + Engineering, 2022, San Diego, California, United States
Abstract
Prevention of integrated circuit counterfeiting through logic locking faces the fundamental challenge of securing an obfuscation key against physical and algorithmic threats. Previous work has focused on strengthening the logic encryption to protect the key against algorithmic attacks but failed to provide adequate physical security. In this work, we propose a logic locking scheme that leverages the non-volatility of the nanomagnet logic (NML) family to achieve both physical and algorithmic security. Polymorphic NML minority gates protect the obfuscation key against algorithmic attacks, while a strain-inducing shield surrounding the nanomagnets provides physical security via a self-destruction mechanism, securing against invasive attacks. We experimentally demonstrate that shielded magnetic domains are indistinguishable, securing against imaging attacks. As NML suffers from low speeds, we propose a hybrid CMOS logic scheme with embedded obfuscated NML “islands”. The NML secures the functionality of sensitive logic while CMOS drives the timing-critical paths.
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Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, and Joseph S. Friedman "Secure logic locking with hybrid CMOS-nanomagnet logic (Conference Presentation)", Proc. SPIE PC12205, Spintronics XV, PC122050M (4 October 2022); https://doi.org/10.1117/12.2633501
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KEYWORDS
Logic
Computer security
Digital electronics
Integrated circuits
Intellectual property
Magnetism
Reverse engineering
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