ZEP520A cold-development technique and tool for ultimate resolution to fabricate 1Xnm bit pattern EB master mold for nano-imprinting lithography for HDD/BPM development

Hideo Kobayashi; Hiromasa Iyama

doi:10.1117/12.978282

29 June 2012 ZEP520A cold-development technique and tool for ultimate resolution to fabricate 1Xnm bit pattern EB master mold for nano-imprinting lithography for HDD/BPM development

Hideo Kobayashi, Hiromasa Iyama

Author Affiliations +

Proceedings Volume 8441, Photomask and Next-Generation Lithography Mask Technology XIX; 84411B (2012) https://doi.org/10.1117/12.978282
Event: Photomask and NGL Mask Technology XIX, 2012, Yokohama, Japan

Abstract

Poor solvent developers are effective for resolution enhancement on a polymer-type EB resist such as ZEP520A. Another way is to utilize "cold-development" technique which was accomplished by a dip-development technique usually. We then designed and successfully built a single-wafer spin-development tool for the cold-development down to -10degC in order to dissolve difficulties of the dip-development. The cold-development certainly helped improve ZEP520A resolution and hole CD size uniformity, and achieved 35nm pitch BPM patterns with the standard developer ZED-N50, but not 25nm pitch yet. By employing a poor solvent mixture of iso-Propyl Alcohol (IPA) and Fluoro-Carbon (FC), 25nm pitch BPM patterns were accomplished. However, the cold-development showed almost no improvement on the IPA/FC mixture developer solvent. This paper describes cold-development technique and a tool, as well as its results, for ZEP520A resolution enhancement to fabricate 1Xnm bits (holes) for EB master-mold for Nano-Imprinting Lithography for 1Tbit/inch² and 25nm pitch Bit Patterned Media development.

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Hideo Kobayashi and Hiromasa Iyama "ZEP520A cold-development technique and tool for ultimate resolution to fabricate 1Xnm bit pattern EB master mold for nano-imprinting lithography for HDD/BPM development", Proc. SPIE 8441, Photomask and Next-Generation Lithography Mask Technology XIX, 84411B (29 June 2012); https://doi.org/10.1117/12.978282

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KEYWORDS

Beam propagation method

Semiconducting wafers

Lithography

Resolution enhancement technologies

Standards development

Fabrication

Optical lithography

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