VLSI physical design analyzer: A profiling and data mining tool

Shikha Somani; Piyush Verma; Sriram Madhavan; Fadi Batarseh; Robert C. Pack; Luigi Capodieci

doi:10.1117/12.2087078

18 March 2015 VLSI physical design analyzer: A profiling and data mining tool

Shikha Somani, Piyush Verma, Sriram Madhavan, Fadi Batarseh, Robert C. Pack, Luigi Capodieci

Proceedings Volume 9427, Design-Process-Technology Co-optimization for Manufacturability IX; 942712 (2015) https://doi.org/10.1117/12.2087078
Event: SPIE Advanced Lithography, 2015, San Jose, California, United States

Abstract

Traditional physical design verification tools employ a deck of known design rules, each of which has a pre-defined pass/fail criteria associated with it. While passing a design rule deck is a necessary condition for a VLSI design to be manufacturable, it is not sufficient. Other physical design profiling decks that attempt to obtain statistical information about the various critical dimensions in the VLSI design lack a systematic methodology for rule enumeration. These decks are often inadequate, unable to extract all the interlayer and intralayer dimensions in a design that have a correlation with process yield. The Physical Design Analyzer is a comprehensive design analysis tool built with the objective of exhaustively exploring design-process correlations to increase the wafer yield.

Citation Download Citation

Shikha Somani, Piyush Verma, Sriram Madhavan, Fadi Batarseh, Robert C. Pack, and Luigi Capodieci "VLSI physical design analyzer: A profiling and data mining tool", Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 942712 (18 March 2015); https://doi.org/10.1117/12.2087078

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