This PDF file contains the front matter associated with SPIE Proceedings Volume 12892, including the Title Page, Copyright information, Table of Contents, and Conference Committee information.

The recent explosive compute growth, mainly fueled by the boost of artificial intelligence (AI) and deep neural networks (DNNs), is currently instigating the demand for a novel computing paradigm that can overcome the insurmountable barriers imposed by conventional electronic computing architectures. Photonic neural networks (PNNs) implemented on silicon photonic integration platforms stand out as a promising candidate to endow neural network (NN) hardware, offering the potential for energy efficient and ultra-fast computations through the utilization of the unique primitives of light i.e. THz bandwidth, low-power and low-latency. Thus far, several demonstrations have revealed the huge potential of PNNs in performing both linear and non-linear NN operations at unparalleled speed and energy consumption metrics. Transforming this potential into a tangible reality for Deep Learning (DL) applications requires, however, a deep understanding of the basic PNN principles, requirements and challenges across all constituent architectural, technological and training aspects. In this paper we review the state-of-the-art photonic linear processors and project their challenges and solutions for future photonic-assisted machine learning engines. Additionally, recent experimental results using SiGe EAMs in a Xbar layout are presented, validating light's credentials to perform ultra-fast linear operations with unparalleled accuracy. Finally, we provide an holistic overview of the optics-informed NN training framework that incorporates the physical properties of photonic building blocks into the training process in order to improve the NN classification accuracy and effectively elevate neuromorphic photonic hardware into high-performance DL computational settings.

This paper summarizes the goals and first results of the EU-funded project DYNAMOS, which develops fast (1 ns) and widely tunable (>110 nm) lasers, energy-efficient (~ fJ/bit), broadband (100 GHz) electro-optic modulators, and high-speed (1 ns) broadcast-and-select packet switches as photonic integrated circuits. These components are used to demonstrate novel data centre networks with highly deterministic sub-microsecond latency to enable maximum congestion reduction, full bisection bandwidth and guaranteed quality of service while reducing cost per Gbps. The methods to achieve the goals are first described. Then the first results from optical amplifiers, modulators, and lasers are reported with the main focus on lasers that can be tuned fast over a wide wavelength range.

Optical neural networks (ONNs) have gained significant attention as a promising neuromorphic framework due to their high parallelism, ultrahigh inference speeds, and low latency. However, the hardware implementation of ONN architectures has been limited by their high area overhead. These architectures have primarily focused on general matrix multiplication (GEMMs), resulting in unnecessarily large area costs and high control complexity. To address these challenges, we propose a hardware-efficient architecture for optical structured neural networks (OSNNs). Through experimental validation using an FPGA-based photonic-electronic testing platform, our neural chip demonstrates its effectiveness in on-chip convolution operations and image recognition tasks, which exhibits lower active component usage, reduced control complexity, and improved energy efficiency.

In recent years, traffic in Information and Communication Technologies (ICT) networks has shown growth of 30% to 40% every year, where server to server communication accounts for 70% of the global IP traffic. This could potentially lead to an increase in traffic by factors of 30x and 1000x in 10 years and 20 years respectively. ICT networks are responsible for 2% of the global emissions with carbon footprint comparable to the aviation industry. Data rates have grown rapidly in the past decade from 1Gb/s server to server communications to 100 Gb/s with plans to increase to 400 Gb/s and 800 Gb/s within this decade. This increase has led to the need for more sustainable solutions in Data centres (clouds) and processing at the edge of communication networks (fog). This paper introduces novel cellular optical interconnection networks that enable energy efficient, scalable, resilient and low latency server to server communications. The proposed optical interconnection network linking servers uses new cellular passive optical network (CPON) architectures. The passive optical networking results in 80% power saving in the networking inside clouds and fog compared to state-of-the-art electronic Spine and Leaf server interconnections and also 85% reduction in latency. The reduction in carbon emissions due to the adoption of CPON technology in cloud and fog networks globally can lead to the elimination of the emissions due to homes in a country the size of Greece or Belgium.

Germanium is the preferred photodetector material at C-band due to its broadband detection range and easy integration with Silicon on Insulator platforms. However, current non-resonant broadband Germanium detectors result in long device lengths, thus resulting in a low RC bandwidth. Smaller resonant detectors provide low parasitic constants at the expense of narrow optical bandwidth. This work presents a waveguide-coupled germanium detector on top of a lattice-shifted photonic crystal waveguide, operating at a broadband slow light mode. Slow light enhances light absorption inside a 14μm long Germanium stripe, resulting in a large responsivity of 0.47A/W at 1V reverse bias and a dark current of 82nA. The device also maintains high responsivity over a bandwidth of 30nm. This work provides a path to design small footprint, broadband, and low dark current Germanium detectors on a CMOS-compatible platform.

The wavelength selective crossconnect (WXC) is a key component of the reconfigurable optical add/drop multiplexer (ROADM). Waveguide type WXC is difficult to increase the number of ports and channels, and free-space type WXC has a low switching speed of milliseconds. To solve these problems, we have proposed a hybrid type WXC. It has microsecond switching speed, where switching is performed by silicon optical circuit and wavelength division (de)multiplexing is performed by free-space optical system. In this paper, we designed the free-space optics and simulated the transmission spectra of a 16-channel 2×2 hybrid-type WXC using CodeV optical simulator. The thickness and the position of the microlens array to be attached to the silicon optical circuit has been designed. The angle of incidence on the grating coupler was 9 degrees, and the thickness of the lens was 0.53 mm. The center of the microlens array was offset by 60.1 μm from the center of the grating coupler. The distance between the lenses in the free-space optics was optimized for the x-z and y-z planes, respectively. The loss spectra with the light emitted from the grating coupler were simulated for each of the 16 channels. The loss at the center frequency of each channel varies from -0.89 dB to -2.87 dB. The loss can be reduced by optimizing the grating coupler design to be -0.89 dB to -0.91 dB.

Inverse width taper edge couplers are the staple of low-loss photonic fiber-to-chip coupling. However, adiabatic mode conversion consumes large die area, which contradicts efforts towards dense integration. By leveraging the advantages of inverse design, we analyze a lithographically manufacturable method for designing fiber-to-chip edge coupling components. Adjoint method optimization is executed via the open-source Stanford Photonic Inverse design Software (SPINS-b) optimization framework to design a preliminary silicon nitride (SiN) fiber-to-chip coupler. Simulation results are validated with Ansys Lumerical finite-difference time-domain (FDTD) solver. Adjoint method inverse design in-plane coupling is evaluated as a solution for photonic integrated circuits with strict size constraints. The design methodology is material and application agnostic, promoting dense photonic integration.

Photonic lanterns offer an efficient solution to transition distorted light from free space into small aperture or single-mode waveguide devices. As a result, photonic lanterns can be useful for free space optical communications, where light is transmitted across a channel with varying atmospheric conditions. This paper will give an overview of studies using photonic lanterns in photon counting optical communication receivers where the detectors are small in aperture and fiber coupled. This paper will also survey other potential uses of photonic lanterns in coherent optical communication receivers or as wavefront sensors in adaptive optical systems.

Proposed for analog computing, multimode fibers have limitations due to slow spatial-domain encoding. Our work showcases instead the computational prowess of a scheme employing a step-index few-mode fiber (FMF) segment, for high-speed spatiotemporal coincidence detection by leveraging the FMF’s dispersive optical properties. The FMF is a custom-made fabrication, with NA = 0.15, a core diameter of 22 μm, and a length of 13 m, introducing delay to temporal input pulses through the supported propagation of higher-order fiber modes. The temporal mixing of these modes creates short-term memory for time-encoded information which we exploit for coincidence detection. By slightly misaligning the input beam with the FMF’s longitudinal axis, we can modify the impact of the different modes on the overall spatial pattern distribution. Our experimental system operates at 1550 nm and encodes 6-bit header patterns with 35.1 ps pulses per bit. With four distinct 40 GHz photodetected points at the output speckle pattern of the FMF, we capture four different time series that correspond to different power integrals and use them to train a logistic regression classifier. Eventually, every header classification is performed with the sampling of only one pulse time window, thus our system operates at 28.5 Gb/s. Remarkably, under various input misalignment conditions, our system demonstrates error rates below 1/5000. This level of performance could not be obtained with a standard step-index multimode fiber of the appropriate length.

Optical interconnect is a novel integration approach that combines optics and silicon between CPUs to meet the requirements of next generation AI computing and data center transmission systems. In these applications, the attachment with precision alignment of multiple fibers from 12 to 16 with their corresponding waveguides is crucial and challenging to establish efficient optical interfaces. We employ a passive alignment technique, utilizing a V-groove structure to accommodate 16 single-mode fibers directly coupling to waveguides without additional optical components. This paper presents results of optical coupling with low losses and variations across all fiber-waveguide pairs.

A novel packaging solution is discussed where both optical and electrical connectivity can be fabricated using ion-exchange (IOX) waveguides integrated into a glass with thin film metallization for an electrical redistribution layer. Design and process aspects are discussed to support silicon photonic flip-chip assembly directly to the glass substrate. Low-loss evanescent coupling occurs between the IOX waveguides embedded in the glass and the photonic chips with high-density silicon nitride optical I/Os. This design enables low-cost assembly methods involving the pick and place alignment of optical components and offers connectivity with low-profile mechanical transfer (MT) ferrule-based fiber connectors.

There is an evolving need for higher integration density for silicon photonic integrated circuits. Broadband operation and polarisation insensitivity are highly coveted. Despite their versatility, the commonly used grating couplers are limited by their high insertion loss, narrow bandwidth, polarisation dependence and their large physical footprint. Inverse taper edge couplers, by contrast, offer lower insertion losses, with relative wavelength and polarisation insensitivity. They are of the same dimension as silicon strip waveguides, hence, coupler spacing is constrained only by the physical size of the coupled fibre, typically amounting to a minimum pitch of 127 μm. To address this constraint, we demonstrate an ultra fast laser inscribed fan-in/fan-out (FIFO) interposer, in boro-aluminosilicate glass (Corning Eagle XG). The FIFO remaps a standard V-groove array of single-mode fibers from a pitch of 127 μm to 50 μm at the silicon interface, effectively increasing the number of ports per millimetre from 8 to 20. Denser arrangements are theoretically possible with the minimum pitch constrained only by the mode-field diameter of the waveguides. The FIFO employs a novel multi-pass waveguide morphology with a high index contrast of 1.12×10⁻², allowing for a reduced mode-field diameter of 5.4 μm at 1550 nm. For coupling to a 500 × 220 nm inverse taper with a tip width of 182±1 nm, we achieve a theoretical coupling loss 3.7 dB (4.4 dB measured). Across the telecommunication band (1520 - 1625 nm), we measure a flat wavelength response (0.35 dB variation) and a peak polarisation dependent loss of 0.8 dB.

Various types of qubits have been proposed and demonstrated for quantum information processing. Amongst the candidates, the trapped ion platform is a forerunner for high-fidelity gates and long coherence times of the qubits. Currently, the most advanced scalable ion trap architecture is based on microfabricated ion trap electrodes integrated with photonic circuits to deliver the laser light of different wavelengths performing the tasks of qubit initialization, gate operations and state determination. These operations require low-loss photonic components for a spectrum of wavelengths to address the trapped ion qubit. Moreover, based on the ion species, the wavelengths also differ. Thus, it requires a whole range of designs to accommodate different wavelengths from infra-red to ultra-violet. A low-loss waveguide is typically constructed using silicon nitride (SiN) as core with silicon oxide (SiO₂) as the cladding material. During fabrication, some of the processes may degrade the surface quality of the waveguide core resulting in higher propagation loss. In this study, the relation between the waveguide propagation loss and to morphology of the waveguide core surface is investigated. The effect on waveguide propagation loss from the bottom oxide and SiN by chemical mechanical polishing (CMP) is compared to SiN dry etching. Both plasma-enhanced (PE) and low-pressure (LP) chemical vapor deposited (CVD) SiN on 12” Si wafers are used during evaluation. In the case of a well-designed waveguide, it is found that a reduction of the sidewall roughness by as much as 15% translates to a 20% improvement in the propagation loss at 1.6 μm. On the contrary, when the waveguide core’s top and bottom surfaces are polished by CMP, the roughness improves by a factor of 1.75 and 18 for oxide and nitride surfaces respectively. This process however reduces the propagation loss by about 7 times at 1.6 μm wavelength. Furthermore, other improvements in processing techniques enable the fabrication of LPCVD SiN waveguides with propagation loss of 0.56 dB/cm at 685nm wavelength. The optimization of foundry processes for the fabrication of SiN waveguides will significantly contribute towards the efficient and high-fidelity gates in in integrated ion trap. It will also improve the performance of the photonic integrated circuits for quantum technology applications.

Integrated photonic computing promises revolutionary strides in processing power, energy efficiency, and speed, propelling us into an era of unprecedented computational capabilities. By harnessing the innate properties of light, such as high-speed propagation, inherent parallel processing capabilities, and the ability to carry vast amounts of information, photonic computing transcends the limitations of traditional electronic architectures. Furthermore, silicon photonic neural networks hold promise to transform artificial intelligence by enabling faster training and inference with significantly reduced power consumption. This potential leap in efficiency could revolutionize data centers, high-performance computing, and edge computing, minimizing environmental impact while expanding the boundaries of computational possibilities. The latest research on our silicon photonic platform for next-generation optical compute accelerators will be presented and discussed.

Optical beamforming for satellite-based phased-array antenna systems can help reduce the payload weight and footprint by replacing the RF hardware with photonic integrated circuits. In this paper, simulation and measurement results are provided for 1×12 optical power splitters that provide a non-uniform Gaussian radio-frequency beam profile, thus eliminating the need for a separate amplitude modulation stage in the beamforming network. This both simplifies the optical beamforming network and reduces the total optical losses. Two splitter designs were studied: a star-coupler with non-uniform output waveguides and a cascade of tapered MMI couplers with unconstrained splitting ratios. These two designs are shown to achieve the target output power profile with insertion losses of 1.7 dB and 0.5 dB, respectively.

While photonics is gaining more and more traction, the barrier to entry remains high. Apart from domain knowledge in photonics, existing tools require programming experience, are very complex and often too expensive for newcomers interested in the field. We propose lowering the entry barrier significantly, by providing a free and open-source photonics design framework called Connect-A-PIC. Connect-A-PIC is an educational and productive tool for photonic integrated circuit (PIC) design and simulation. Using a no-code inspired, visual user interface, the goal is to enable anyone with some basic knowledge in optics to learn, explore and create PICs, from design and simulation to synthesized layouts for fabrication. Connect-A-PIC introduces a novel type of standard component library (SCL) for fast and simple netlist generation. The modular design allows for expansion of the SCL and functionality and re-targeting of the output to other tools for more advanced design and simulation needs.

In the context of an ever-growing volume of data generated by established and emerging technologies, such as 5G, the Internet of Things, artificial intelligence, machine learning, blockchain, and virtual reality, faster communication speed is demanded by data centers and high-performance computing. Transceiver requirements surged from 100 to 400 Gb/s and beyond. In this scenario, photonics aims to enable Tb/s optical communication at energies below 1 pJ/bit. Targeting higher communication rates while maintaining a low power budget can significantly benefit from 3D photonic chip architectures. This paper presents the simulation-based design, fabrication, and characterization of a monolithically integrated optical through-silicon waveguide that facilitates the connection between different surfaces of a silicon chip. Deep reactive ion etching was employed in both the Bosch and Cryogenic variants to evaluate the effect of sidewall roughness on propagation losses. The mechanical stability of the waveguide was ensured by interrupting the annular trench with a bridging structure. The high-refractive-index contrast to air provides tight light confinement for a core size of up to 50 μm and multimode operation at 1550 nm. The morphology was characterized using scanning electron microscopy (SEM), and optical transmission characterization was performed using relative power loss measurements. A tunable laser source was buttcoupled to a waveguide to analyze light transmission efficiency. Preliminary measurements using single-mode fiber show that the transmitted values exceeded 99% for all structures.

Chilas develops off-the-shelf laser sources based on hybrid integration of Photonic Integrated Chips (PICs). Combining the high optical powers of semiconducting optical amplifiers (SOAs) with low-loss wavelength tunable mirror structures on Si₃N₄ PICs results in compact and robust tunable laser sources. These extended cavity diode lasers (ECDLs) exhibit unique characteristics like wide tuning ranges (>100 nm), ultra-narrow linewidths (<1 kHz) and high output powers. Here we present up to 162.5 mW of optical output power by combining two SOAs inside a single cavity, thereby scaling the output power without the need of additional optical amplification on the output port. The presented laser operates inside the telecom C-band, but the strategy can be tailored to other wavelengths like 850 nm, 780 nm and 690 nm, where Si3N4 plays a key role. This new generation of hybrid integrated ECDLs, exhibiting high optical output powers, wide wavelength tuning ranges and ultra narrow linewidths, opens up a wide range of applications.

In this paper we introduce two European projects and one UK project, which will respectively develop an eco-system for advanced integrated photonic technologies for reconfigurable WDM hyperscale data centre architectures and quantum networking. Horizon Europe DYNAMOS project is developing the building blocks for reconfigurable WDM architectures including driverless electro-optic modulators, tuneable lasers and a novel under-board fibre flexplane system. Horizon Europe ADOPTION is developing co-packaged optics solutions for an ultra-high bandwidth silicon photonic PIC transceiver. InnovateUK QPICPAC is developing a novel stamped metallic micro-mirror array for advanced PIC-to-fibre coupling with the potential to dramatically reduce PIC design and assembly costs. Although the latter is a quantum project, the advanced PIC coupling technologies will be immediately deployable in co-packaged optics applications.

Co-Packaged Optics is a technology development expected to be widely deployed within the next few years, to support continued increases in bandwidth for data centers and HPC while energy per bit is driven down. CPO architectures replace transceivers in faceplate pluggable modules with an optical link from the faceplate to transceiver PICs packaged on or near the ASIC switch substrate. The optical connections to the PIC and on the faceplate are the subjects of a lot of attention, with multiple approaches under consideration for the former and existing or imminent solutions for the latter. The intervening optical fibers and cables have however been relatively neglected, but the careful engineering of these components is also critical. This paper will review the status of the development for near-term implementation of the optical infrastructure from the faceplate to the PIC, with particular focus on the required optical and mechanical properties of optical fiber and its deployment in the switch box. We will also discuss how future developments in this infrastructure can help sustain continued bandwidth increases and reduction in power consumption.

Commercial introduction of emerging integrated photonics technologies requires a long and complex multi-layer product development, industrialization, and qualification cycles at all levels of value chain from initial product design, material sourcing, component-system-module manufacturing, and testing, through marketing and delivery of new products to the market. Scalable assembly and packaging of electronic-photonic integrated modules is important and may take more than a half of the entire product’s costs. In this paper, we will report on some of our industrial processes for scalable photonics packaging, as well as challenges and results obtained from our research and innovation projects.

In this paper, we discuss a hybrid photonic packaging platform that reduces module size by enhancing the functionality of glass-based substrates, frames and caps featuring electrical, thermal, mechanical, and optical functions. Furthermore, the substrates can be functionalized with integrated optical waveguides by means of thermal ion exchange. New results for low loss bending’s will be discussed. The packaging approach offers the possibility to integrate beam forming optics and further (optical) components within the miniaturized photonic module. This serves clients who do not want to cope with alignment of single micro-optics, which is inherently a tight tolerance process, but instead want to have a surface-mountable device that provides certain optical inputs and outputs which can be interconnected in a defined manner, i.e. a collimated beam or fiber coupling. As an example, we present modular photonic subsystems that enable complex configurations such as master oscillator power amplifier (MOPA). Panel-level manufacturing and high precision automated assembly techniques on panel-level are demonstrated. Laser-based sealing processes using metal absorption structures are demonstrated to form metallic bonds between glass layers. Singulation of the panel stack at the end of the process chain ensures streamlined handling and allows for cost effective manufacturing.

Optical components which transmit light can be made through various processes and materials, such as glass, thermosets, or thermoplastics. These components are then assembled with fiber optic cables and light sources to complete the full optical assembly. This potential mixture of different types of materials can impact dimensional position of various alignment features needed for low signal loss. In this paper, we show the beneficial or detrimental effects of mixed materials and component design on dimensional alignment in optical assemblies. For assembly, solder reflow capable thermoplastic resins are evaluated and compared to other commercially available material classes in ease of assembly, design, and performance parameters.

Co-Packaged Optics is a development of technology for high speed data switching, to be implemented widely in data center and high-performance computing architectures as a means to continue expansion of bandwidth and reduction of energy per bit. This development removes transceivers from the switch faceplate and replaces them with an optical link from the faceplate to transceiver PICs packaged on or near the ASIC switch substrate. Most approaches involve CW external lasers being carried over polarization-maintaining fiber to the PICs to be modulated for outgoing traffic. Lasers are active components with extremely high power densities and thus a relatively high failure rate, and they perform poorly at high temperatures such as prevail near the switch package. Therefore they will be remotely located or in removeable/front-panel pluggable packages that can be replaced with minimal disruption; this will require the use of optical fiber connectors. System reliability is significantly enhanced by using fewer, higher-power lasers, so very high powers are anticipated for these sources, up to and perhaps exceeding 250 mW, and any connector must be able to reliably tolerate these power levels over the lifetime of the laser or switch box. The use of expanded beam connectors reduces the optical intensity at exposed surfaces compared to PC connectors, and may mitigate some potential issues. We report on our initial studies to address this question of connector performance at these extreme conditions, with results on expanded beam single-mode connectors carrying high laser power in the O-band over many hundreds of hours.

In the last two decades, fiber-optic communication and photonic integrated circuits have been popularized rapidly. However, the dimension difference between optical fiber devices and photonic chips makes the design of fiber-to-chip couplers challenging. To solve this problem, several coupling strategies have been proposed, such as inverted taper-based structures, grating couplers and meta-material based couplers. In this paper, the simulation result of several metamaterial-based couplers for a quantum fiber-optic communication system are demonstrated. Simulation results show that these coupler has 60% focusing efficiency at the 1550nm wavelength with its mode field diameter less than 3um.

We describe a method for fabricating inline lenses by splicing a graded-index multi-mode (GRIN) fiber to a single-mode fiber (SMF), with a core-less fiber segment controlling focal length and spot size. Based on the experimental results and precision of our glass cleaving and processing equipment, we demonstrate the feasibility of producing fiber lenses with focal lengths ranging from 10 μm to 1 mm, spot sizes from sub-μm to 30 μm, and numerical apertures from 0.10 to 0.30, showcasing potential applications in compact spaces.

Current optical communication systems slowly fall behind the data-carrying capacity needs of the modern world. These systems mostly implement single-mode fibers, which is one of the main reasons why such networks are falling behind. To overcome this issue and increase data rate, wavelength-division multiplexing (WDM) and space-division multiplexing (SDM) arise as very appealing solutions. Both of them utilize components such as demultiplexers, multiplexers, amplifiers, single or multimode fibers, etc. While improving the performance of optical communication systems, it is also important to keep them compact or to use fewer components. To serve these needs, we propose a multipurpose device that can carry our mode conversion and wavelength demultiplexing simultaneously. The proposed device is designed on a Silicon-on-Insulator (SOI) platform by using topology optimization (TO) and ensure fabrication possibility, we have set the minimum feature size to 70 nm. Our device has the dimensions of 4 μm by 3 μm having a thickness of 220 nm, and can convert TE1 mode to TE0 mode at output ports. The upper port is set to transmit the wavelength range of 1.52 μm – 1.56 μm whereas the lower waveguide is set to allow 1.58 μm – 1.62 μm band to pass through. In addition, our device yields a high conversion efficiency around 90%. We believe that our device can pave the way for designing efficient multifunctional devices to be used in future optical communication systems.

The field of electronics and digital technology is constantly changing, and logic gates continue to play a crucial role in it. In this dynamic environment, photonic gates offer a variety of advantages such as signal transmission over long distances with minimal loss, compactness, and high-speed data processing. As such, photonic logic gates are paving the way for the development of photonic computing; however, their integration into high-performance systems remains a challenge. To address this problem, we proposed Silicon-photonics based analog signal optical logic operations utilizing complex interference phenomena. The study deals with the wave analysis using the finite-difference time-domain method and inverse design technique to develop topologically-optimized scalable photonic logic gates and their complex combinations. In our study, we designed the fundamental OR, AND, NOT gates and achieved a good contrast ratio greater than 17 dB in terms of the devices’ transmission for the wavelength range of 1520-1600 nm. We could also demonstrate their successful integration to construct a half-adder and XOR gate. This represents a significant advancement in the search for effective photonic computing and also highlights the potential for these structures to be used as the foundation for more complex and sophisticated on-chip photonic computing architectures in the future.