Mr. Jaeil Lee Profile

Jaeil Lee

at SAMSUNG Electronics Co Ltd

SPIE Involvement:

Author

Publications (4)

Proceedings Article | 27 April 2023 Presentation + Paper

Quantifying CD-SEM contact hole roughness and shape combined with machine learning-based pattern fidelity scores for process optimization and monitoring

Hyosung Lee, Seonho Lee, Hyungju Rah, Iksun Park, Jaeil Lee, Jaewoong Sohn, Yongchan Kim, Christoph Ehrlich, Philip Groeger, Sven Boese, Enrico Bellmann, Stefan Buhl, Seop Kim, Kang-san Lee

Proceedings Volume 12496, 124961P (2023) https://doi.org/10.1117/12.2657679

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Scanning electron microscopy, Image processing, Image restoration, Education and training, Contour extraction, Machine learning, Deformation, Finite element methods

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Proceedings Article | 27 April 2023 Poster + Paper

Absolute alignment measurement of underlayer and overlayer of diffraction-based overlay mark by image-based alignment metrology system

Jaeil Lee, Iksun Park, Youngjin Park, Jonghyun Hwang, Hyeonjun Ha, Jaewoong Sohn, Jaehee Lee, Jinseok Moon, Yuki Kondo, Satoshi Ando

Proceedings Volume 12496, 124962F (2023) https://doi.org/10.1117/12.2657656

KEYWORDS: Overlay metrology, Optical alignment, Metrology

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SPIE Journal Paper | 29 March 2016

High-order distortion control using a computational prediction method for device overlay

Young Seog Kang, Cedric Affentauschegg, Jan Mulkens, Jang-Sun Kim, Ju Hee Shin, Young Ha Kim, YoungSun Nam, Young-Sin Choi, Hunhwan Ha, Dong-Han Lee, Jae-il Lee, Umar Rizvi, Bernd Geh, Rob van der Heijden, Jan Baselmans, Oh-Sung Kwon

JM3, Vol. 15, Issue 02, 021403, (March 2016) https://doi.org/10.1117/12.10.1117/1.JMM.15.2.021403

KEYWORDS: Overlay metrology, Metrology, Distortion, Control systems, Semiconducting wafers, Scanners, Etching, Information technology, Image processing, Photomasks

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Proceedings Article | 15 March 2016 Paper

Intra-lot wafer by wafer overlay control using integrated and standalone metrology combined sampling

Young Sin Choi, Young Sun Nam, Dong Han Lee, Jae Il Lee, Young Seog Kang, Se Yeon Jang, Jeong Heung Kong

Proceedings Volume 9780, 978009 (2016) https://doi.org/10.1117/12.2219922

KEYWORDS: Semiconducting wafers, Overlay metrology, Metrology, Data corrections, Reticles, HVAC controls, Scanners, Time metrology, Data integration, Lithography, Semiconductors, Control systems, Semiconductor manufacturing, Manufacturing, Computer simulations, Content addressable memory

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