Mr. Wojtek J. Poppe
at NVIDIA
SPIE Involvement:
Author
Publications (11)

PROCEEDINGS ARTICLE | March 13, 2009
Proc. SPIE. 7275, Design for Manufacturability through Design-Process Integration III
KEYWORDS: Lithography, Metrology, Calibration, Etching, Resistance, Process control, Design for manufacturing, Photomasks, Structural design, Semiconducting wafers

PROCEEDINGS ARTICLE | March 18, 2008
Proc. SPIE. 6925, Design for Manufacturability through Design-Process Integration II
KEYWORDS: Lithography, Oscillators, Manufacturing, Design for manufacturing, Transistors, Semiconducting wafers, Circuit switching, Device simulation, Phase shifts, Instrument modeling

PROCEEDINGS ARTICLE | November 1, 2007
Proc. SPIE. 6730, Photomask Technology 2007
KEYWORDS: Internet, Data mining, Data modeling, Data storage, Databases, Transistors, Critical dimension metrology, Semiconducting wafers, Process modeling, Data analysis

PROCEEDINGS ARTICLE | March 28, 2007
Proc. SPIE. 6520, Optical Microlithography XX
KEYWORDS: Lithography, Databases, Metals, Photomasks, Line width roughness, Transistors, Critical dimension metrology, Structural design, Semiconducting wafers, Cryogenics

PROCEEDINGS ARTICLE | March 28, 2007
Proc. SPIE. 6521, Design for Manufacturability through Design-Process Integration
KEYWORDS: Lithography, Monochromatic aberrations, Etching, Manufacturing, Design for manufacturing, Photomasks, Computer aided design, Process modeling, Device simulation, Chemical mechanical planarization

PROCEEDINGS ARTICLE | March 29, 2006
Proc. SPIE. 6153, Advances in Resist Technology and Processing XXIII
KEYWORDS: Electron beam lithography, Edge detection, Detection and tracking algorithms, Image processing, Electrons, Scanning electron microscopy, Printing, Algorithm development, Semiconducting wafers, Chemically amplified resists

Showing 5 of 11 publications
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