Dr. Monique Ercken Profile

Dr. Monique Ercken

Program Manager Advanced Patterning at imec

SPIE Involvement:

Author

Publications (34)

Proceedings Article | 26 March 2019 Presentation + Paper

Presentation + Paper

Patterning challenges for beyond 3nm logic devices: example of an interconnected magnetic tunnel junction

N. A. Thiam, D. Wan, L. Souriau, K. Babaei Gavan, N. Rassoul, J. Swerts, S. Couet, E. Raymenants, J. Jussot, D. Trivkovic, M. Ercken, C. Wilson, I. Radu

Proceedings Volume 10958, 109580Y (2019) https://doi.org/10.1117/12.2515086

KEYWORDS: Magnetism, Etching, Electron beam lithography, Lithography, Electrodes, Optical lithography, Semiconducting wafers, Overlay metrology, Optical alignment, Double patterning technology

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Proceedings Article | 26 March 2019 Presentation + Paper

Presentation + Paper

LCDU optimization of STT-MRAM 50nm pitch MTJ pillars for process window improvement

Murat Pak, Davide Crotti, Farrukh Yasin, Monique Ercken, Sandip Halder, Danilo De Simone, Pieter Vanelderen, Laurent Souriau, Hubert Hody, Gouri Sankar Kar

Proceedings Volume 10957, 109570R (2019) https://doi.org/10.1117/12.2515023

KEYWORDS: Etching, Optical lithography, Semiconducting wafers, Critical dimension metrology, Resistance, Magnetism, Photoresist processing, Manufacturing, Printing, Extreme ultraviolet lithography

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Proceedings Article | 27 March 2017 Presentation + Paper

Presentation + Paper

CMOS patterning over high-aspect ratio topographies for N10/N7 using spin-on carbon hardmasks

Toby Hopf, Monique Ercken, Geert Mannaert, Eddy Kunnen, Zheng Tao, Nadia Vandenbroeck, Farid Sebaai, Yoshiaki Kikuchi, Hans Mertens, Stefan Kubicek, Steven Demuynck, Naoto Horiguchi

Proceedings Volume 10146, 1014618 (2017) https://doi.org/10.1117/12.2257668

KEYWORDS: Optical lithography, System on a chip, Carbon, Photoresist materials, Etching, Lithography, Front end of line, Silicon, Photomasks

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Proceedings Article | 21 March 2016 Paper

Paper

Analyzing block placement errors in SADP patterning

Shinji Kobayashi, Soichiro Okada, Satoru Shimura, Kathleen Nafus, Carlos Fonseca, Marc Demand, Serge Biesemans, Janko Versluijs, Monique Ercken, Philippe Foubert, Shinobu Miyazaki

Proceedings Volume 9779, 97791T (2016) https://doi.org/10.1117/12.2218597

KEYWORDS: Optical lithography, Overlay metrology, Process control, Error analysis, Semiconductors, Error control coding, Wafer inspection, Inspection, Manufacturing, Semiconducting wafers, System on a chip, Etching, Device simulation, Plasma etching, Scanning electron microscopy, Tin

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Proceedings Article | 31 March 2014 Paper

Paper

Modeling the lithography of ion implantation resists on topography

Gustaf Winroth, Alessandro Vaglio Pret, Monique Ercken, Stewart Robinson, John Biafore

Proceedings Volume 9052, 90520Z (2014) https://doi.org/10.1117/12.2046298

KEYWORDS: Lithography, Optical lithography, Silicon, Ion implantation, Light wave propagation, 3D modeling, Photomasks, Critical dimension metrology, Waveguides

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SPIE Journal Paper | 5 September 2013

Precuring implant photoresists for shrink and patterning control

Gustaf Winroth, Erik Rosseel, Christie Delvaux, Efrain Sanchez, Monique Ercken

JM3, Vol. 12, Issue 04, 041303, (September 2013) https://doi.org/10.1117/12.10.1117/1.JMM.12.4.041303

KEYWORDS: Photoresist materials, Lithography, Ions, Ion implantation, Critical dimension metrology, Scanning electron microscopy, Annealing, Optical lithography, Etching, Photomasks

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Proceedings Article | 29 March 2013 Paper

Paper

Precuring implant photoresists for shrink and patterning control

Gustaf Winroth, Erik Rosseel, Christie Delvaux, Efrain Altamirano Sanchez, Monique Ercken

Proceedings Volume 8682, 868207 (2013) https://doi.org/10.1117/12.2011423

KEYWORDS: Ions, Photoresist materials, Lithography, Ion implantation, Critical dimension metrology, Annealing, Scanning electron microscopy, Electron beam lithography, Etching, Polymers

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Polymeric photoresists are readily being used as the stopping layer for ions during implantation processes in manufacturing of integrated circuitry. In order to be compatible for standard optical lithography with deep ultraviolet exposures, the state-of-the-art resists are chemically amplified; as they are for photoresists for etch patterning. Partially deprotected, including patterned, photoresists contain a range of small molecular weight species that are prone to escape the resist if the resist was to be irradiated by additional UV-light, electron beams or ion bombardment. For implant processes in device integration this is becoming progressively the most topical issue for aggressive nodes, where 193 nm compatible resists are progressively turning out to be the new platform for implant lithography. These will shrink significantly during the ion implantation and subsequently produce undesired doping gradients on a length scale comparable to the target feature width. In addition, conventional UV-flood exposure that is common for 248 nm resist platforms is not directly transferrable to 193 nm resists. In this paper, we explore the precuring options available for state-of-the-art implant photoresists for 193 nm lithography, in which we target to reduce the shrinkage during implantation for trench critical dimensions that are relevant for nodes below 20 nm. We present an extensive study comprising of different approaches, including laser-, ion- and electronbased treatments. Each treatment is individually investigated with the aim not only to find a valid pretreatment for shrinkage control during implantation, but also to fundamentally understand what effect alternative pretreatments have on the profile and dimensions of thick photoresists used as implant stopping layers. We find that there are viable options for further process optimization in order to integrate them into device process flows. To this extent, we show the shrink behavior after pretreatment and compare the additional shrink dynamics after implantation.

Proceedings Article | 20 March 2012 Paper

Paper

Patterning development in spin-on hard mask systems for 30nm half-pitch EUV technology

Vincent Truffert, Ivan Pollentier, Philippe Foubert, Frederic Lazzarino, Yuusuke Anno, Christopher Wilson, Monique Ercken, Roel Gronheid, Steven Demuynck, Xavier Buch

Proceedings Volume 8325, 832511 (2012) https://doi.org/10.1117/12.916149

KEYWORDS: Extreme ultraviolet, Photomasks, Optical lithography, Photoresist materials, Extreme ultraviolet lithography, Etching, Polymers, System on a chip, Glasses, Semiconducting wafers

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As Extreme Ultra Violet technology (EUV) is being introduced, multilayer hard mask patterning becomes a key option in order to transfer the lithographic patterns into the circuit stack. In particular, spin-on multilayers can play a decisive role on the process roadmap as a more cost-effective solution than Chemical Vapour Deposition options. The integration of spin-on hard masks in EUV technology nevertheless requires these products to be EUV-outgassing friendly. In addition to this, the spin-on solutions must withstand the demanding photoresist and circuit stack aspect ratios during patterning. This paper presents the EUV process development for contacted metal lines with 30nm half-pitch dimensions in a dual damascene application. The performance of an all-spin-on multilayer system composed of an EUVphotosensitive layer, an organic underlayer, a silicon-rich middle layer and a carbon-rich bottom layer is demonstrated. Firstly, outgassing of the various polymer layers in vacuum is a critical parameter to control since it can directly impact the EUV-tool-optics lifetime. The qualification, selection and process optimisation of different materials for use in the ASML NXE:3100 EUV scanner are shown by interpreting Residual Gas Analysis data. The outgassed species for different types of layers are compared. In this study, the shielding effect of the top layers on the outgassing of the layers underneath is quantified. The influence of the layer composition is also discussed. Secondly, the lithographic performance of the 30nm half-pitch process on the NXE:3100 is characterized with process windows and profile control using the IMEC process-of-reference. The CD uniformity results within wafer and across wafer-batches are used to demonstrate the process maturity. Finally, considering the patternability of the EUV process, we demonstrate the ability of the all-spin-on multilayer system to planarize over the challenging dual damascene topography. To conclude on the potential of this scheme, we describe the etched dual damascene patterns into a dielectric stack which is representative for the 30nm half pitch technology node.

Proceedings Article | 13 March 2012 Paper

Paper

Process development using negative tone development for the dark field critical layers in a 28nm node process

Janko Versluijs, Vincent Truffert, Gayle Murdoch, Peter De Bisschop, Darko Trivkovic, Vincent Wiaux, Eddy Kunnen, Laurent Souriau, Steven Demuynck, Monique Ercken

Proceedings Volume 8326, 83260W (2012) https://doi.org/10.1117/12.916700

KEYWORDS: Source mask optimization, Optical lithography, Etching, Semiconducting wafers, Photomasks, Immersion lithography, Metals, Lithography, Lithographic illumination, Image processing

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The demand for ever shrinking semiconductor devices is driving efforts to reduce pattern dimensions in semiconductor lithography. In this work, the aim is to find a single patterning litho solution for a 28nm technology node using 193nm immersion lithography. Target poly pitch is 110nm and metal1 pitch is 90nm. For this, we have introduced a range of different techniques to reach this goal. At this node, it becomes essential to include the layout itself into the optimization process. This leads to the introduction of restricted design rules, together with the co-optimization of source and mask (SMO) and the use of customized illumination modes (freeform illumination sources; Flexray^TM). Also, negative tone development (NTD) is employed to further extend the applicability of 193nm immersion lithography. Traditionally, the printing of contacts and trenches is done by using a dark field mask in combination with a positive tone resist and positive tone development. The use of negative tone development enables images reversal. This allows benefiting from the improved imaging performance when exposing with bright field masks. The same features can be printed in positive tone resists and with improved process latitudes. At the same time intermediate metal (IM) layers are used to connect the front-end and back-end-of-line, resulting in huge area benefits compared to layouts without these IM layers. The use of these IM layers will not happen for the 28nm node, but is intended to be introduced towards the 20nm node, and beyond. Nevertheless, the choice was made to use this architecture to obtain a first learning cycle on this approach. In this study, the use of negative tone development is explored, and its use for the various dark field critical layers in a 28nm node process is successfully demonstrated. In order to obtain sufficiently large process windows, structures are printed larger than the designed target CD. As a consequence, a shrink of the structures needs to be applied to obtain the target CD after etch. Different shrink approaches are compared. Final results on wafer are discussed, focusing on critical layers as IM1, IM2, Via0 and Metal1.

Proceedings Article | 8 April 2011 Paper

Paper

Patterning challenges in setting up a 16nm node 6T-SRAM device using EUV lithography

Tom Vandeweyer, Johan De Backer, Janko Versluijs, Vincent Truffert, Staf Verhaegen, Monique Ercken, Mircea Dusa

Proceedings Volume 7969, 79691K (2011) https://doi.org/10.1117/12.881690

KEYWORDS: Optical lithography, Etching, Extreme ultraviolet lithography, Optical proximity correction, Extreme ultraviolet, Lithography, Critical dimension metrology, Photomasks, Semiconducting wafers

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Proceedings Article | 23 March 2009 Paper

Paper

Performance verification of resist loss measurement method using top-view CD-SEM images for hyper-NA lithography

Mayuka Osaki, Maki Tanaka, Chie Shishido, Shaunee Cheng, David Laidler, Monique Ercken, Efrain Altamirano

Proceedings Volume 7272, 727211 (2009) https://doi.org/10.1117/12.813472

KEYWORDS: Etching, Semiconducting wafers, Surface roughness, Finite element methods, Scanning electron microscopy, Lithography, Atomic force microscopy, Critical dimension metrology, Atomic force microscope, Photoresist processing

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Proceedings Article | 16 April 2008 Paper

Paper

Advanced CD-SEM metrology to improve total process control performance for hyper-NA lithography

Mayuka Osaki, Maki Tanaka, Chie Shishido, Toru Ishimoto, Norio Hasegawa, Kohei Sekiguchi, Kenji Watanabe, Shaunee Cheng, David Laidler, Monique Ercken, Efrain Altamirano

Proceedings Volume 6922, 69221B (2008) https://doi.org/10.1117/12.771886

KEYWORDS: Critical dimension metrology, Etching, Photoresist processing, Lithography, Scanning electron microscopy, Semiconducting wafers, Finite element methods, Signal attenuation, Process control, Metrology

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Proceedings Article | 4 April 2007 Paper

Paper

Measurement and evaluation of water uptake by resists, top coats, stacks, and correlation with watermark defects

Philippe Foubert, Michael Kocsis, Roel Gronheid, Shinji Kishimura, Akimasa Soyano, Kathleen Nafus, Nickolay Stepanenko, Johan De Backer, Nadia Vandenbroeck, Monique Ercken

Proceedings Volume 6519, 65190E (2007) https://doi.org/10.1117/12.713150

KEYWORDS: Digital watermarking, Thin film coatings, Water, Semiconducting wafers, Crystals, Quartz, Silicon, Immersion lithography, Inspection, Polymers

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SPIE Journal Paper | 1 July 2006

Spectral analysis of line width roughness and its application to immersion lithography

Gian Lorusso, Leonardus Leunissen, Monique Ercken, Christie Delvaux, Frieda Van Roey, Nadia Vandenbroeck, H. Yang, Amir Azordegan, Tony DiBiase

JM3, Vol. 5, Issue 03, 033003, (July 2006) https://doi.org/10.1117/12.10.1117/1.2242982

KEYWORDS: Line width roughness, Critical dimension metrology, Metrology, Immersion lithography, Process control, Etching, Semiconducting wafers, Scanning electron microscopy, Electron microscopes, Optical lithography

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Proceedings Article | 29 March 2006 Paper

Paper

Top coat or no top coat for immersion lithography?

N. Stepanenko, Hyun-Woo Kim, S. Kishimura, D. Van Den Heuvel, N. Vandenbroeck, M. Kocsis, P. Foubert, M. Maenhoudt, M. Ercken, F. Van Roey, R. Gronheid, I. Pollentier, D. Vangoidsenhoven, C. Delvaux, C. Baerts, S. O'Brien, W. Fyen, G. Wells

Proceedings Volume 6153, 615304 (2006) https://doi.org/10.1117/12.660158

KEYWORDS: Thin film coatings, Digital watermarking, Particles, Semiconducting wafers, Immersion lithography, Scanners, Water, Critical dimension metrology, Photomasks, Scatterometry

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Since the moment immersion lithography appeared in the roadmaps of IC manufacturers, the question whether to use top coats has become one of the important topics for discussions. The top coats used in immersion lithography have proved to serve as good protectors from leaching of the resist components (PAGs, bases) into the water. However their application complicates the process and may lead to two side effects. First, top coats can affect the process window and resist profile depending on the material's refractive index, thickness, acidity, chemical interaction with the resist and the soaking time. Second, the top coat application may increase the total amount of defects on the wafer. Having an immersion resist which could work without the top coat would be a preferable solution. Still, it is quite challenging to make such a resist as direct water/resist interaction may also result in process window changes, CD variations, generation of additional defects. We have performed a systematic evaluation of a large number of immersion resist and top coat combinations, using the ASML XT:1250Di scanner at IMEC. The samples for the experiments were provided by all the leading resist and top coat suppliers. Particular attention was paid to how the resist and top coat materials from different vendors interacted with each other. Among the factors which could influence the total amount of defects or CD variations on the wafer were: the material's dynamic contact angle and its interaction with the scanner stage speed, top coat thickness and intermixing layer formation, water uptake and leaching. We have examined the importance of all mentioned factors, using such analytical techniques as Resist Development Analyser (RDA), Quartz Crystal Microbalance (QCM), Mass Spectroscopy (MS) and scatterometry. We have also evaluated the influence of the pre- and pos- exposure rinse processes on the defectivity. In this paper we will present the data on imaging and defectivity performance of the resists with and without the use of top coats. So far we can conclude that top coat/resist approach used in immersion lithography needs some more improvements (i.e. process, materials properties) in order to be implemented in high volume manufacturing.

Proceedings Article | 24 March 2006 Paper

Paper

Comprehensive approach to MuGFET metrology

G. Lorusso, P. Leray, T. Vandeweyer, M. Ercken, C. Delvaux, I. Pollentier, S. Cheng, N. Collaert, R. Rooyackers, B. Degroote, M. Jurczak, S. Biesemans, O. Richard, H. Bender, A. Azordegan, J. McCormack, S. Shirke, J. Prochazka, T. Long

Proceedings Volume 6152, 615219 (2006) https://doi.org/10.1117/12.656076

KEYWORDS: Metrology, Line width roughness, Scatterometry, Oxides, Semiconducting wafers, 3D metrology, Calibration, Transmission electron microscopy, Silicon, Optical proximity correction

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Proceedings Article | 21 March 2006 Paper

Paper

Dynamic leaching procedure on an immersion interference printer

Roel Gronheid, Enrico Tenaglia, Monique Ercken

Proceedings Volume 6154, 61541I (2006) https://doi.org/10.1117/12.684420

KEYWORDS: Semiconducting wafers, Contamination, Scanners, Printing, Immersion lithography, Silicon, Thin film coatings, Liquids, Analytical research, Fluid dynamics

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Proceedings Article | 20 March 2006 Paper

Paper

Immersion specific defect mechanisms: findings and recommendations for their control

Michael Kocsis, Dieter Van Den Heuvel, Roel Gronheid, Mireille Maenhoudt, Dizana Vangoidsenhoven, Greg Wells, Nickolay Stepanenko, Michael Benndorf, Hyun Woo Kim, Shinji Kishimura, Monique Ercken, Frieda Van Roey, S. O'Brien, Wim Fyen, Philippe Foubert, Richard Moerman, Bob Streefkerk

Proceedings Volume 6154, 615409 (2006) https://doi.org/10.1117/12.660432

KEYWORDS: Semiconducting wafers, Thin film coatings, Water, Particles, Scanners, Immersion lithography, Manufacturing, Scanning electron microscopy, Space operations, Distortion

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Proceedings Article | 15 March 2006 Paper

Paper

Early learning on hyper-NA lithography using two-beam immersion interference

Eric Hendrickx, Maaike Op de Beeck, Roel Gronheid, Janko Versluijs, Lieve Van Look, Monique Ercken, Geert Vandenberghe

Proceedings Volume 6154, 61541X (2006) https://doi.org/10.1117/12.659007

KEYWORDS: Polarization, Liquids, Semiconducting wafers, Electroluminescence, Printing, Water, Prisms, Refractive index, Nanoimprint lithography, Scanners

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Proceedings Article | 12 May 2005 Paper

Paper

Resist profile control in immersion lithography using scatterometry measurements

I. Pollentier, M. Ercken, P. Foubert, S. Cheng

Proceedings Volume 5754, (2005) https://doi.org/10.1117/12.599745

KEYWORDS: Semiconducting wafers, Photoresist processing, Scanners, Scatterometry, Immersion lithography, Lithography, Scatter measurement, Printing, Critical dimension metrology, Diffusion

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Control of critical dimension (CD) and resist profile is increasingly important in low-k₁ lithography, and becomes more difficult in thin resist processing due to the chemical interaction occurring at the resist surfaces. Implementation of immersion lithography will make the control even more challenging since more sources of chemical interaction can play a role, e.g. leaching of photo active material from the resist into the water, or diffusion of the water into the resist. Moreover, the contact of the liquid in the scanner showerhead with the wafer surface is a dynamic and local interaction, which needs to be understood and quantified, since variations in soak time are a possible source of intra-field and across wafer CD-variations. In this paper we developed a methodology to understand and to quantify the impact of immersion scanner soak on resist profile control and CD-control. The methodology is on the one hand based on the simulation of the showerhead movements over the wafer during the immersion lithography process, where for a particular location on the wafer the soak time is calculated by accumulating the interaction time every time the showerhead is passing that particular location. On the other hand the methodology quantifies experimentally how much resist profile change and CD-variation is caused by a particular pre- and post-soak time, by testing the process in a virtual immersion set-up and measuring the CD-response with high-precision scatterometry. In this way, we were able to predict CD-variations related to immersion soak. Using the initial resist and topcoat processes, we recently experimentally verified on the ASML XT:1250Di immersion tool at IMEC that these soak related CD-variations exist. The effects are small, but in line with the soak time simulations and the CD-response obtained on the virtual immersion set-up. This demonstrates that the methodology described above could be very useful to select materials for lithography processes and to set specifications for allowed CD-variations in line with to the over-all allowed CD-budget.

Proceedings Article | 10 May 2005 Paper

Paper

Full spectral analysis of line width roughness

L. Leunissen, G. Lorusso, M. Ercken, J. Croon, H. Yang, A. Azordegan, T. DiBiase

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.600185

KEYWORDS: Line width roughness, Line edge roughness, Critical dimension metrology, Transistors, Etching, Fractal analysis, Semiconducting wafers, Metrology, Scanning electron microscopy, Electron beam lithography

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Proceedings Article | 4 May 2005 Paper

Paper

Impact of water and top-coats on lithographic performance in 193-nm immersion lithography

Shinji Kishimura, Roel Gronheid, Monique Ercken, Mireille Maenhoudt, Takahiro Matsuo, Masayuki Endo, Masaru Sasago

Proceedings Volume 5753, (2005) https://doi.org/10.1117/12.598532

KEYWORDS: Ions, Immersion lithography, Water, Lithography, Optical lithography, Analytical research, Quartz, Crystals, Semiconducting wafers, Surface roughness

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Proceedings Article | 24 May 2004 Paper

Paper

Optimization of scatterometry parameters for shallow trench isolation (STI) monitor

Philippe Leray, Shaunee Cheng, Stephanie Kremer, Monique Ercken, Ivan Pollentier

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.537440

KEYWORDS: Etching, Scatterometry, Silicon, Dysprosium, Semiconducting wafers, Critical dimension metrology, Metrology, Scanning electron microscopy, Single crystal X-ray diffraction, Scatter measurement

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Proceedings Article | 24 May 2004 Paper

Paper

Effects of different processing conditions on line-edge roughness for 193-nm and 157-nm resists

Monique Ercken, Leonardus Leunissen, Ivan Pollentier, George Patsis, Vassilios Constantoudis, Evangelos Gogolides

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.537339

KEYWORDS: Line edge roughness, Scanning electron microscopy, Etching, Atomic force microscopy, Diffusion, Metrology, Statistical analysis, Edge roughness, Spatial frequencies, Optical lithography

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Proceedings Article | 2 June 2003 Paper

Paper

Line-edge roughness reduction and CD slimming using hardbake processing

Richard Peters, Kevin Lucas, Jonathan Cobb, Colita Parker, Kyle Patterson, Robb McCauley, Monique Ercken, Frieda Van Roey, Nadia Vandenbroeck, Ivan Pollentier

Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485027

KEYWORDS: Line edge roughness, Monochromatic aberrations, Transistors, Scanning electron microscopy, 193nm lithography, Cadmium, Optical lithography, Extreme ultraviolet, Etching, Control systems

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Proceedings Article | 30 July 2002 Paper

Paper

Model-based corrections for complementary phase-shift mask toward 70-nm technology node

Frank Driessen, Geert Vandenberghe, Monique Ercken, Patrick Montgomery, Kurt Ronse, Paul van Adrichem, Jason Li, Hua-Yu Liu, Linard Karklin

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.490520

KEYWORDS: Model-based design

Proceedings Article | 30 July 2002 Paper

Paper

Tuning and simulating a 193-nm resist for 2D applications

William Howard, Vincent Wiaux, Monique Ercken, Bang Bui, Jeff Byers, Mike Pochkowski

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474499

KEYWORDS: Photomasks, Semiconducting wafers, Scanning electron microscopy, Optical proximity correction, Metrology, Reticles, Finite element methods, Data modeling, Lithography, 3D image processing

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Proceedings Article | 14 September 2001 Paper

Paper

Molecular base sensitivity studies of various DUV resists used in semiconductor fabrication

David Ruede, Monique Ercken, Tom Borgers

Proceedings Volume 4346, (2001) https://doi.org/10.1117/12.435635

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Deep ultraviolet, Photoresist materials, Photoresist processing, Contamination, Semiconductors, Manufacturing, Monochromatic aberrations, Wafer testing

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Proceedings Article | 14 September 2001 Paper

Paper

ArF lithography options for 100-nm technologies

Geert Vandenberghe, Young-Chang Kim, Christie Delvaux, Kevin Lucas, Sang-Jun Choi, Monique Ercken, Kurt Ronse, Bert Vleeming

Proceedings Volume 4346, (2001) https://doi.org/10.1117/12.435718

KEYWORDS: Binary data, Photomasks, Diffraction, Optical proximity correction, Electroluminescence, Lithographic illumination, Optical lithography, Scanning electron microscopy, Printing, Lithography

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Proceedings Article | 24 August 2001 Paper

Paper

193-nm contact photoresist reflow feasibility study

Kevin Lucas, Mark Slezak, Monique Ercken, Frieda Van Roey

Proceedings Volume 4345, (2001) https://doi.org/10.1117/12.436850

KEYWORDS: Photoresist materials, Optical lithography, 193nm lithography, Photoresist processing, Photomasks, Semiconducting wafers, Etching, Scanners, Lithography, Cadmium

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Proceedings Article | 26 April 2001 Paper

Paper

Front-end-of-line process development using 193-nm lithography

Ivan Pollentier, Monique Ercken, Astrid Eliat, Christie Delvaux, Patrick Jaenen, Kurt Ronse

Proceedings Volume 4404, (2001) https://doi.org/10.1117/12.425235

KEYWORDS: Etching, Line edge roughness, 193nm lithography, Critical dimension metrology, Scanning electron microscopy, Lithography, Semiconducting wafers, Head-mounted displays, Monochromatic aberrations, Manufacturing

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Proceedings Article | 23 June 2000 Paper

Paper

Progress in qualifying and quantifying the airborne base sensitivity of modern chemically amplified DUV photoresists

Devon Kinkead, Monique Ercken

Proceedings Volume 3999, (2000) https://doi.org/10.1117/12.388362

KEYWORDS: Contamination, Critical dimension metrology, Lithography, Deep ultraviolet, Photoresist materials, Photons, Semiconductors, Quantum efficiency, Polymers, Semiconducting wafers

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Proceedings Article | 26 July 1999 Paper

Paper

Variable-threshold resist models for lithography simulation

John Randall, Kurt Ronse, Thomas Marschner, Anne-Marie Goethals, Monique Ercken

Proceedings Volume 3679, (1999) https://doi.org/10.1117/12.354329

KEYWORDS: Data modeling, Lithography, Photoresist processing, Semiconducting wafers, Mathematical modeling, Wafer-level optics, Reticles, Data conversion, Image processing, Cadmium sulfide

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Lithography simulation tools eliminate costly and time consuming experiments allowing new processes to be developed quickly. There are excellent simulation programs that allow sophisticated modeling of the optics in current and future lithography tools. In many instances, the weak point in lithography simulations is the relatively poor capability to model resists. Sophisticated and accurate models have been developed for many technologically important i-line resists. However the models for 248nm chemically amplified resist are not as mature, and there are many resist of interest for which there are no reliable models. Even when they do exist, these full resist models are computationally expensive and not suitable for some applications such as model based optical proximity corrections. When useful models do not exist, lithographers use the aerial imaging portions of the lithography simulation tools and apply the simplest of resist models, the so-called constant threshold model. While this allows the critical dimensions to be approximated for high contrast resist, it fails to capture important aspects of most resist processes. Empirically trained resists models have come to be used where more accurate lithography simulations are required, but full resist models either do not exist or are to slow to be useful. This paper explores the use of a class of empirically trained models known as variable threshold resist models. This type of model stats with an aerial image calculation and uses a function to locally vary the threshold used to predict CDs. This type of model may be quickly trained for a specific resist process and potentially applied for a wide range of numerical aperture and partial coherence settings. We show how multiple dose and focus data can be used to train a model that includes input parameters extracted from the aerial image as well as pattern factors and exposure dose. The data present suggests that models trained with one set of optical conditions are useful at other optical settings. We also explore different approaches to validate the models and demonstrate some consider the effect of across wafer variation on the training data.

Proceedings Article | 26 July 1999 Paper

Paper

Matching simulation and experiment for chemically amplified resists

Chris Mack, Monique Ercken, Myriam Moelants

Proceedings Volume 3679, (1999) https://doi.org/10.1117/12.354330

KEYWORDS: Chemically amplified resists, Lithography, Semiconducting wafers, Calibration, Temperature metrology, Reticles, Diffusion, Photomasks, Photoresist processing, Standards development

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Showing 5 of 34 publications

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